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NXP Semiconductors
IP4358CX6
Quad channel low capacitance ESD protection
2. Pinning information
Table 1.
Pinning
Pin
A1 and A2
B1 and B2
Description
ESD protection
ground
Simplified outline
bump A1
index area
Graphic symbol
C1 and C2
ESD protection
1
2
A1
A2
C1
C2
A
3. Ordering information
B
C
008aaa249
transparent top view,
solder balls facing down
B1
B2
008aaa250
Table 2.
Ordering information
Type number
Package
Name
Description
Version
IP4358CX6
IP4358CX6
Product data sheet
WLCSP6
wafer level chip-size package; 6 bumps (2 × 3)
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 October 2010
IP4358CX6
? NXP B.V. 2010. All rights reserved.
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